Intel is seeking a Lead Design Verification Engineer for the Silicon Chassis team, focusing on defining end-to-end verification strategies for critical chassis and interconnect IP programs. This technical leadership role requires collaboration with architecture, design, software, and methodology teams to ensure high-quality delivery. The engineer will leverage deep design verification expertise and knowledge of memory subsystems to drive execution and unblock issues. AI-assisted workflows are integral to the development process, emphasizing the importance of consistent execution against schedule and quality goals.

• BS/MS in Electrical Engineering, Computer Science, or related field with 14+ years of relevant experience in design verification.
• Extensive background in IP design verification with significant experience in subsystem and SoC-level verification.
• Proven deep expertise in interconnects, caches, and memory subsystems, including multiple bus protocols such as AMBA CHI, ACE, AXI, PCIe, UCIe, and CXL.
• Strong background in simulation and formal verification methodologies including UVM, SVA, ABV, and co-simulation.
• Advanced hands-on coding proficiency across SystemVerilog/UVM, C/C++, Python, and build systems.

• Define verification strategy, technical standards, and execution model for critical blocks.
• Lead development of reusable environments, tools, and targeted test plans.
• Collaborate closely with architecture, design, software, and methodology teams from specification through bringup.
• Drive ownership of multiple critical blocks and verification components.
• Lead IP delivery to multiple customers while ensuring technical excellence.

• Intel offers a comprehensive benefits package including competitive pay, stock programs, healthcare coverage, retirement plans, paid time off, parental leave, and programs supporting employee wellbeing and professional development.