The Senior Formal Verification Engineer at Intel's AI SoC organization will ensure the functional correctness of complex digital designs using advanced formal methods. This role involves developing and maintaining formal verification environments and collaborating with design teams to enhance verification strategies for AI SoCs. The position offers the opportunity to work on cutting-edge technology and mentor junior engineers. The engineer will also contribute to pre-silicon verification and post-silicon debug support.

• Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science with 10+ years of related experience.
• 7+ years of experience in ASIC/SoC verification with at least 3+ years focused on formal verification.
• Expertise in formal verification methodologies and tools such as JasperGold, VC Formal, and Questa Formal.
• Strong knowledge of System Verilog Assertions (SVA) and property-based verification.
• Deep understanding of digital design concepts, clock domain crossings, and low-power design techniques.
• Familiarity with UVM-based simulation environments.
• Scripting skills in Python, TCL, or Perl for automation and flow optimization.
• Ability to lead projects and work cross-functionally under tight schedules.
• Strong analytical skills and attention to detail.

• Own formal verification strategy and execution for complex SoC IP blocks and subsystems.
• Develop and maintain formal verification environments using SystemVerilog Assertions (SVA) and industry-standard formal tools.
• Write and review formal properties, constraints, and coverage goals to achieve exhaustive verification.
• Collaborate with design and simulation teams to identify corner cases and complement dynamic verification.
• Drive formal sign-off, including convergence analysis and coverage closure.
• Contribute to pre-silicon verification, chip bring-up, and post-silicon debug support.
• Mentor junior engineers and establish best practices for formal verification methodology.
• Define and develop scalable, reusable verification plans for block, subsystem, and SoC levels.
• Execute verification plans and run emulation and system simulation models to validate design, analyze power/performance, and uncover bugs.
• Debug and root-cause issues in the presilicon environment and implement corrective measures.
• Collaborate with architects, RTL developers, and physical design teams to improve verification of complex features.
• Document test plans and lead technical reviews with design and architecture teams.
• Incorporate and execute security verification activities within regression and debug tests.
• Maintain and enhance existing functional verification infrastructure and methodology.
• Apply learnings from post-silicon validation to improve coverage and quality for future products.

• Intel offers a comprehensive benefits package including competitive pay, stock programs, healthcare coverage, retirement plans, paid time off, parental leave, and programs supporting employee wellbeing and professional development.