In this role as a CPU Design Verification Engineer at Apple, you will play a crucial part in the chip design effort, collaborating with various disciplines to ensure the functional correctness of CPU designs. Your work will directly impact the delivery of innovative products to millions of customers. The team values passion and dedication, and you will be expected to contribute to the verification efforts independently while also being a great teammate. This position requires a strong background in CPU architecture and verification techniques.

• Minimum BS degree in Electrical Engineering, Computer Engineering, or Computer Science.
• 10+ years of relevant industry experience.
• Experience with CPU architecture.
• Experience in digital logic design, chip architecture, and microarchitecture.
• Programming knowledge in C/C++ or SystemVerilog.
• Operating system knowledge.
• Experience in post-silicon bringup.
• Experience with advanced verification techniques.

• Work closely with architecture and RTL designers on verifying the functional correctness of the design.
• Develop test plans and test environments.
• Develop tests in assembly, C, or vectors according to test plans.
• Develop coverage monitors and analyze coverage to ensure all the test cases in the plans are covered.
• Develop checkers and SystemVerilog or C-based transactors to verify the design.

• Employees at Apple are often offered comprehensive benefits that support physical and mental well-being—flexible medical plans, confidential counseling, onsite wellness centers at major campuses, and resources for fitness and daily life. Families typically receive fertility support, paid parental leave with gradual return, caregiving leave, and dependent-care guidance, while financial perks commonly include stock grants (with purchase discounts), 401(k) matching, and income-protection coverage. Employees also see robust time off, Apple University learning and tuition reimbursement, donation matching and paid volunteer hours, and deep product and partner discounts.