The Senior ECAD Library Engineer will manage the Digital Network Architecture (DNA) of Google's hardware by building and organizing libraries for schematic and PCB design. This role is critical in ensuring that components are designed for precision and manufacturability, impacting the infrastructure that supports millions of users. The engineer will work closely with Electrical Engineering, PCB Layout, and Manufacturing teams to create a library system that supports seamless hardware lifecycles. This position is part of the Platforms Infrastructure Engineering team, which designs and builds the hardware and software technologies that power all of Google's services.

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Physics, or a related technical field.
• 4 years of experience developing libraries for Cadence schematic and PCB design software.
• Experience with STEP file integration into the library.
• Experience developing symbols and footprints for BGA packages and high-density connectors.
• Experience working within IPC standards for padstacks, footprints, and naming conventions.
• Experience with DFx principles for PCB manufacturing, assembly, and test.

• Manage the library, build footprints and symbols, and organize Part Table File (PTF) tables.
• Support Electrical Engineering and PCB layout based on library viewpoints such as pin/part arrangement.
• Work with manufacturing and component engineers to create common footprints for non-identical parts.
• Continually improve the library setup and structure.

• Employees at Google are often offered benefits like comprehensive health insurance, 401(k) matching, and flexible work arrangements, among other benefits.