Intel is seeking a Silicon Packaging Design Engineer to contribute to the development of silicon interposer and bridge designs. This role involves optimizing package performance and collaborating with various teams to enhance system-level design. The engineer will utilize advanced EDA tools and ensure design feasibility through rigorous analysis. This position is crucial for driving innovation in semiconductor technology and improving connectivity.

• Bachelor's degree with 3+ years of experience or Master's degree with 2+ years of experience in Electrical Engineering, Computer Engineering, or a STEM related field.
• Proficiency in custom layout and Auto-place-and-route EDA tools including Virtuoso, Innovus, FusionCompiler, ICvalidator, and/or Calibre.
• Experience with silicon physical layout design and development, routing interconnects, and/or review tools.
• At least 1+ year of experience with Analog/Mixed Signal fundamentals for signal integrity assessments and I/O fundamentals, or Power Distribution and power integrity assessments, or reliability requirements for interconnects.

• Design and implement physical layout and routing of silicon interposers and embedded bridges.
• Perform substrate fit and routing studies to evaluate design tradeoffs in performance, cost, and manufacturability.
• Collaborate closely with silicon, technology development, and hardware teams to optimize system-level design.
• Propose design updates and conduct internal and external reviews to ensure design feasibility.
• Analyze design data and resolve design rule checks (DRCs) to achieve optimized and manufacturable package designs.
• Utilize industry-leading electronic design automation (EDA) tools to create robust package layouts.
• Document processes and design specifications in the product lifecycle management system.
• Conduct reviews with partner teams to close milestone requirements.

• Intel offers a comprehensive benefits package including competitive pay, stock programs, healthcare coverage, retirement plans, paid time off, parental leave, and programs supporting employee wellbeing and professional development.