The Design Verification Engineer for Digital Signal Processing at Google will focus on shaping the future of AI/ML hardware acceleration. This role involves working with cutting-edge TPU technology to verify complex digital designs, particularly in the context of DSP blocks. The engineer will be part of a team that develops custom silicon solutions and ensures functional integrity through rigorous verification processes. This position offers the opportunity to contribute to innovative products that impact millions of users worldwide.

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field.
• 8 years of experience in design verification with a focus on digital signal processing, communication systems, or arithmetic logic blocks.
• Experience with scripting in Python, Perl, or Makefile for automation.

• Design, build, and maintain constrained-random verification environments using SystemVerilog and UVM for individual DSP blocks.
• Develop 'Golden Model' checkers to compare RTL output against architectural models to ensure accuracy.
• Define and implement functional coverage plans to ensure all architectural corner cases and fixed-point overflows are exercised.
• Create complex sequences and virtual sequencers to stress-test DSP adaptation loops under various noise and jitter profiles.
• Lead the debug of RTL failures, working closely with DSP designers to resolve discrepancies between the hardware implementation and the algorithmic specification.

• Employees at Google are often offered benefits like comprehensive health insurance, 401(k) matching, and flexible work arrangements, among other benefits.