As an ASIC Design Verification Engineer at Google, you will work on shaping the future of AI and ML hardware acceleration by developing cutting-edge TPU technology. You will be part of a dynamic team responsible for verifying complex digital designs, focusing on TPU architecture and its integration within AI/ML systems. This role involves collaborating with design engineers and participating in the entire design and verification life cycle. Your contributions will help drive innovation in products that impact millions of users worldwide.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 4 years of experience with design verification.
• Experience with SystemVerilog/Verilog.
• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science is preferred.
• 6 years of experience with silicon design verification is preferred.
• Experience with scripting languages such as Python or Perl.

• Plan the verification of complex digital design blocks by understanding the design specification.
• Create and enhance constrained-random verification environments using SystemVerilog and UVM.
• Identify and write all types of coverage measures for stimulus and corner-cases.
• Debug tests with design engineers to deliver functionally correct design blocks.
• Close coverage measures to identify verification holes and show progress towards tape-out.

• Employees at Google are often offered benefits like comprehensive health insurance, 401(k) matching, and flexible work arrangements, among other benefits.