JobsMixed Signal Logic Design Engineer
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Mixed Signal Logic Design Engineer

Intel

Location

Folsom, CA, Santa Clara, CA, San Jose, CA

Type

Full-time

Posted

5/29/2026

Compensation

$122,440 - $232,190 per year

Undergraduate with 2+ Years of Experience
Approval 96.6%·Filings 2,117·New hires 632·
💎 Strong Sponsor
·FY 2025

Job description

This position involves developing logic design, RTL coding, and simulation for mixed signal and high-speed IPs to create cell libraries and functional units for full chip designs. The role requires participation in defining architecture and microarchitecture features while ensuring design integrity for physical implementation. The team focuses on customer-driven solutions and aims to deliver measurable business impact across Intel's product and foundry businesses. Candidates will work closely with SoC customers to ensure high-quality integration of IP blocks.

Requirements

  • Bachelor's degree with 4+ years of experience or master's with 3+ years of experience or PhD with 1+ years of experience in Computer Science, Computer Engineering, Electrical Engineering, or a related technical discipline.
  • 2+ years of experience in RTL design and coding using System Verilog and Verilog.
  • Expertise in mixed signal fundamentals, low-power design using UPF, and clock gating.
  • Deep understanding of digital and analog design principles, clock domain crossing, and power-performance tradeoffs.
  • Experience with hardware simulation tools and methodologies such as VCS/Verdi.
  • Familiarity with IP environment and configuration management tools.
  • Experience with Front End design tools for Lint, CDC, RDC, Voltage Domain Crossings, Synthesis, and Low power design.

Responsibilities

  • Develop the logic design, RTL coding, and simulation for mixed signal and high-speed IPs.
  • Participate in the definition of architecture and microarchitecture features of the block being designed.
  • Apply strategies, tools, and methods for mixed signal designs to optimize mixed signal logic.
  • Review the verification plan and implementation to ensure design features are verified correctly.
  • Resolve and implement corrective measures for failing RTL tests to ensure correctness of features.
  • Support SoC customers to ensure high-quality integration of the IP block.

Benefits

  • Intel offers a comprehensive benefits package including competitive pay, stock programs, healthcare coverage, retirement plans, paid time off, parental leave, and programs supporting employee wellbeing and professional development.

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