The ASIC Design Verification Engineer role at Google Cloud focuses on shaping the future of AI/ML hardware acceleration. You will work on developing custom silicon solutions, specifically targeting TPU architecture and its integration within AI/ML-driven systems. This position involves collaborating with design engineers and contributing to the verification of complex digital designs. You will be part of a dynamic team that drives innovation in data center accelerators.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 1 year of experience in design verification.
• Experience with SystemVerilog/Verilog.
• Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science is preferred.
• Experience with Universal Verification Methodology (UVM) testbenches and methodologies.

• Plan the verification of complex digital design blocks and understand the design specification.
• Create a constrained-random verification environment using SystemVerilog and Universal Verification Methodology (UVM).
• Identify and write all types of coverage measures for stimulus and corner-cases.
• Debug tests with design engineers to deliver correct design blocks.
• Close coverage measures to identify verification holes and to show progress towards tape-out.

• Employees at Google are often offered benefits like comprehensive health insurance, 401(k) matching, and flexible work arrangements, among other benefits.