As an ASIC Formal Verification Engineer at Google, you will play a crucial role in shaping the future of AI/ML hardware acceleration by verifying complex digital designs, particularly focusing on TPU architecture. You will be part of a team that develops custom silicon solutions for Google's demanding AI/ML applications. Your expertise in formal verification will contribute to the innovation behind products used by millions worldwide. This position involves collaboration with architecture and design teams to ensure the reliability and performance of next-generation data center accelerators.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 8 years of experience in silicon development or ASIC/SoC design.
• Experience with SystemVerilog Assertions (SVA) and formal verification methods.

• Define and drive the formal verification sign-off approach across complex IP and SoC designs, utilizing advanced formal techniques.
• Architect, develop, and deploy reusable formal testbenches, methodology flows, and high-coverage SystemVerilog Assertions (SVA) suites across multiple designs and projects.
• Collaborate with architecture and design teams to translate complex system and IP specifications into comprehensive formal verification test plans.
• Maintain and enhance continuous integration, regression flows, and dashboarding to provide formal verification status and sign-off metrics.
• Guide logic designers and verification engineers to effectively incorporate formal methods into their workflows.

• Employees at Google are often offered benefits like comprehensive health insurance, 401(k) matching, and flexible work arrangements, among other benefits.