The Staff Engineer, TPU Co-Design role at Google focuses on shaping the future of AI and ML hardware acceleration. You will work with cutting-edge TPU technology that powers Google's AI applications, contributing to the development of custom silicon solutions. This position requires collaboration across AI research and engineering to drive architectural innovations for machine learning capabilities. You will play a key role in bridging model architecture and hardware design, ensuring high-performance and power-efficient accelerators.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 10 years of experience in computer architecture, chip architecture, or hardware-software co-design.
• Experience developing systems for performance modeling, simulation, or system analysis.

• Drive the definition and optimization of the hardware/software stack to enable performant training and serving of large ML models.
• Collaborate with research and modeling teams to innovate on model architectures, focusing on scaling, quality, and their direct impact on hardware performance.
• Lead the development of configurable architectural simulators and cycle-accurate performance models to quantify microarchitectural optimizations and evaluate architectural decisions.
• Conduct system-level performance analysis across highly distributed ML systems, innovating new methodologies to balance compute, memory bandwidth, and inter-chip network requirements.
• Engage with partners across hardware design, compiler development, and ML research to transition architectural innovations from concept to production.

• Employees at Google are often offered benefits like comprehensive health insurance, 401(k) matching, and flexible work arrangements, among other benefits.