This role involves driving the end-to-end development of substrate design from concept through tape out, focusing on physical layout and routing of package design. The engineer will work closely with silicon and hardware teams to optimize performance and pinout. The position requires strong technical skills in design and electrical analysis, as well as a solid background in semiconductor fabrication and packaging. The team aims to enhance semiconductor manufacturing processes while ensuring high-quality service for customers.

• Ph.D. or master's degree in electrical engineering, chemical engineering, mechanical engineering, or material science.
• 10+ years of in-depth knowledge and background in package, PCB design, or IC digital design.
• Strong analytical ability and problem-solving skills.
• Experience with design and electromagnetic simulation tools such as Mentor, Cadence tools, SPICE, and Ansys.
• Experience in Cadence Allegro platform tools and/or Mentor Xpedition platform tools.

• Drive end-to-end development for substrate design from concept through tape out.
• Implement physical layout and routing of the package design.
• Perform substrate fit and routing studies to establish design, performance, and cost tradeoffs.
• Define substrate design rules and conduct internal and external reviews.
• Analyze data and resolve DRCs to optimize package design.
• Complete documentation and collateral into the product lifecycle management system.

• Intel offers a comprehensive benefits package including competitive pay, stock programs, healthcare coverage, retirement plans, paid time off, parental leave, and programs supporting employee wellbeing and professional development.