JobsSenior Design Verification Engineer
Intel logo

Senior Design Verification Engineer

Intel

Location

Santa Clara, CA

Type

Full-time

Posted

6/9/2026

Compensation

$164,470 - $311,890 per year

Undergraduate with 5+ Years of Experience
Approval 96.6%·Filings 2,117·New hires 632·
💎 Strong Sponsor
·FY 2025

Job description

Intel is seeking a Senior Design Verification Engineer for the Silicon Chassis team, focusing on end-to-end verification of critical chassis and interconnect IP blocks. The role involves driving quality in testbench architecture and collaborating closely with architecture, design, and software teams. Candidates should have strong technical depth in design verification methodologies and protocol verification. The position also emphasizes the use of AI-assisted workflows and requires consistent execution against schedule and quality goals.

Requirements

  • Bachelor of Science Degree in Electrical or Computer Engineering, Computer Science, or in a STEM related field
  • 10+ years of experience in design verification with extensive background in IP DV and subsystem and SoC-level verification
  • Experience in interconnects, caches, and memory subsystems, including multiple bus protocols such as AMBA, PCIe, UCIe, and CXL
  • Experience in verification of global functions including debug, trace, clock and power management, RAS, QoS, and security features
  • Experience in simulation and formal verification methodologies including UVM, SVA, ABV, and co-simulation
  • Hands-on coding experience across SystemVerilog/UVM, C/C++, Python, and build systems
  • Experience working with RTL, physical design, and CAD tool flows

Responsibilities

  • Own verification planning and execution for key IP features across IP and subsystem integration points
  • Build scalable verification environments and targeted test plans with reusable test benches, checkers, VIPs, and behavioral models
  • Collaborate closely with architecture, design, and software teams from specification through bringup
  • Drive ownership of multiple critical blocks and verification components, taking full responsibility for functional signoffs
  • Lead IP delivery to multiple customers while ensuring technical excellence
  • Drive convergence of simulation and formal verification into unified bug hunting and coverage closure strategies
  • Mentor and develop verification engineers and establish verification best practices

Benefits

  • Intel offers a comprehensive benefits package including competitive pay, stock programs, healthcare coverage, retirement plans, paid time off, parental leave, and programs supporting employee wellbeing and professional development.

Is this posting expired or inaccurate?