The ASIC Design Verification Engineer role at Google focuses on shaping the future of AI/ML hardware acceleration, specifically through the development of Tensor Processing Unit (TPU) technology. The engineer will work within a team to verify complex digital designs, particularly in the context of TPU architecture and its integration into AI/ML systems. Responsibilities include project definition, design verification, and silicon bring-up, contributing to the innovation behind products used by millions worldwide. This position offers a dynamic environment where collaboration and technical expertise are essential.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 2 years of experience in design verification.
• Experience with SystemVerilog/Verilog.

• Plan the verification of complex digital design blocks by understanding design specifications and collaborating with design engineers.
• Build a constrained-random verification environment using SystemVerilog and Universal Verification Methodology (UVM).
• Identify and write coverage measures for stimulus and corner-cases.
• Debug tests with design engineers to ensure functionally correct design blocks.
• Analyze coverage measures to identify verification gaps and demonstrate progress towards tape-out.

• Employees at Google are often offered benefits like comprehensive health insurance, 401(k) matching, and flexible work arrangements, among other benefits.