The Senior CPU Design Verification Engineer, Emulation role at Google involves working within a team that develops custom silicon solutions for Google's products. The position focuses on bridging Emulation, Design Verification, and Register-Transfer Level teams to enhance root-cause analysis and debugging processes. The engineer will utilize their expertise in hardware emulation and design verification to improve product performance and reliability. This role is critical in shaping the future of hardware experiences for millions of users worldwide.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 8 years of experience in both Design Verification (UVM/SystemVerilog) and Hardware Emulation.
• Experience reproducing post-silicon lab failures in emulation or simulation environments.
• Experience with industry-standard debug tools such as Synopsys Verdi and Cadence SimVision.
• Proficiency in scripting languages like Python, TCL, and Bash to automate debug workflows.

• Act as the critical bridge between Emulation, Design Verification, and Register-Transfer Level teams to accelerate root-cause analysis.
• Correlate Design Verification simulation failures with emulation results by analyzing SystemVerilog/UVM testbenches.
• Lead post-silicon debug by analyzing lab artifacts such as scan dumps and software logs to reproduce silicon bugs in emulation.
• Create tools and scripts to automate debug pipelines and bridge software workloads with hardware triggers.
• Utilize deep micro-architecture knowledge to rapidly isolate complex hardware issues.

• Employees at Google are often offered benefits like comprehensive health insurance, 401(k) matching, and flexible work arrangements, among other benefits.