The ASIC Power Engineer for ML Accelerators at Google will focus on shaping the future of AI/ML hardware acceleration. This role involves driving cutting-edge TPU technology that powers Google's demanding AI/ML applications. The engineer will work within a team dedicated to developing custom silicon solutions and will leverage their design and verification expertise to verify complex digital designs. The position offers a dynamic environment with responsibilities spanning project definition, design, and implementation.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 8 years of experience with custom silicon design, including SoCs and ASICs.
• Experience with RTL design using Verilog or SystemVerilog.

• Contribute to design power modeling and drive convergence to power goals.
• Investigate, specify, and deploy architectural and microarchitectural power optimization techniques.
• Define best practices and methodologies to achieve low-power designs.
• Collaborate with cross-functional software and system teams to create novel power management architectures.

• Employees at Google are often offered benefits like comprehensive health insurance, 401(k) matching, and flexible work arrangements, among other benefits.