The Senior Design Verification Engineer role at Google focuses on developing custom silicon solutions for multimedia and AI/ML applications. The engineer will work within a team that combines AI, software, and hardware to create innovative products. This position requires expertise in verification methodologies and collaboration with various stakeholders to ensure high-quality design verification. The engineer will contribute to shaping the next generation of hardware experiences that enhance user interaction with technology.

• Bachelor's degree in electrical engineering or computer science, or equivalent practical experience.
• 8 years of experience with verification methodologies and languages such as UVM and SystemVerilog.
• Experience with interconnect protocols like AXI, APB, and ACE.
• Experience developing and maintaining verification testbenches, test cases, and test environments.

• Work with designers, architects, and other stakeholders to create detailed test plans and deliverables.
• Plan the verification of multimedia design blocks at the subsystem level by understanding design specifications.
• Collaborate with architecture, software, design, and back-end implementation stakeholders to make technical decisions.
• Create and enhance constrained-random verification environments using SystemVerilog and UVM.
• Identify verification gaps and demonstrate advancement towards tape-out through comprehensive coverage metrics.

• Employees at Google are often offered benefits like comprehensive health insurance, 401(k) matching, and flexible work arrangements, among other benefits.