The Test Design Hardware Developer role at IBM focuses on architecting and implementing DFT strategies for complex SoC designs. The team is dedicated to delivering high-performance silicon and values collaboration among engineers. Candidates should have hands-on experience with Synopsys tools and a passion for solving complex challenges. This position offers an opportunity to contribute to a mission-driven engineering culture.

• Bachelor's degree in a relevant field, with a master's degree preferred.
• 5+ years of hands-on experience in DFT implementation for complex ASIC/SoC designs.
• Proven expertise with Synopsys DFT tools including DFT Compiler, TetraMAX, and TestMAX.
• Strong scripting skills in Python, TCL, and Bash.
• Experience working in Unix/Linux-based environments.

• Architect and implement DFT strategies for complex SoC designs.
• Develop and integrate DFT architectures including scan insertion and boundary scan.
• Utilize Synopsys tools for design testability analysis and test point insertion.
• Generate test patterns and validate circuit behavior and coverage.
• Collaborate with cross-functional teams to ensure DFT requirements are met.

• IBM offers competitive compensation, healthcare coverage, retirement programs, paid parental leave, tuition assistance, wellness programs, flexible work options, and extensive learning and certification resources.