The Multimedia Camera HW team at Qualcomm is seeking a strong ASIC design engineer to contribute to the design of advanced image and video processing blocks. This role involves collaboration with hardware and system architects to micro-architect and design hardware specific to multimedia and camera image signal processing algorithms. The candidate will be responsible for core level IP RTL design and ensuring quality of results through various checks. Strong communication and planning skills are essential in this fast-paced environment.

• Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field.
• 4+ years of experience in Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
• 3+ years of industry experience in Verilog or VHDL RTL design.
• Experience with design verification and bus protocols like AHB and AXI.

• Collaborate with hardware/system architects to micro-architect and design hardware for multimedia and camera image signal processing algorithms.
• Own and deliver core level IP RTL design.
• Run synthesis and review results to ensure desired quality of results is met.
• Perform design rule checks, low power checks, and cross-clock-domain checks.
• Evaluate performance, area, power, and system cost tradeoffs.
• Work closely with design verification engineers to develop test plans and reference bus-functional models.
• Implement and debug tests at both the module and core level throughout the development cycle.
• Create and maintain design documents.

• Qualcomm offers competitive compensation, annual bonuses, stock programs, comprehensive healthcare coverage, retirement plans, wellness programs, parental leave, flexible work options, and professional development opportunities.