Qualcomm is seeking talented engineers and architects to join a new team focused on developing a next-generation processor. The team will work on designing and implementing Data Caches and a Coherent Interconnect for cutting-edge SoCs. As a key contributor, you will be involved in architecture definition, performance modeling, analysis, and RTL implementation. This role offers a unique opportunity to work on a high-impact project in a collaborative and innovative environment.

• Strong background in processor architecture and micro-architecture.
• Hands-on experience with data caches and coherent interconnects.
• Familiarity with cache coherence protocols such as CHI or ACE.
• Proficiency in C/C++ and/or Verilog/SystemVerilog.
• Experience in IP development and performance analysis.
• Bachelor's degree in Electrical Engineering, Computer Science, Computer Engineering, or related field and 4+ years of relevant experience, or a Master's degree with 3+ years, or a PhD with 2+ years.

• Architect and design high-performance data cache subsystems and coherent interconnects.
• Develop performance models and analyze trade-offs in power, area, and latency.
• Collaborate with cross-functional teams including architecture, RTL, verification, and software.
• Contribute to the development of new IP blocks and integration into SoC platforms.

• Qualcomm offers competitive compensation, annual bonuses, stock programs, comprehensive healthcare coverage, retirement plans, wellness programs, parental leave, flexible work options, and professional development opportunities.