JobsStaff/Sr. Staff Design Verification Engineer - QGOV
Staff/Sr. Staff Design Verification Engineer - QGOV
QualcommStaff/Sr. Staff Design Verification Engineer - QGOV
QualcommLocation
San Diego, CA
Type
Full-time
Posted
6/11/2026
Compensation
$164,000 - $246,000 per year
Undergraduate with 5+ Years of Experience
Master's with 5+ Years of Experience
PhD with 5+ Years of Experience
Approval 97.1%·Filings 1,170·New hires 255·
✓ Established Sponsor
·FY 2025Job description
The Design Verification Engineer at Qualcomm Technologies, Inc. will focus on developing verification methodologies for hardware building blocks and standard interfaces. This role requires expertise in RTL design using Verilog and System Verilog, as well as experience in simulation and emulation. The ideal candidate will work in a collaborative environment, pushing the quality and efficiency of test benches while ensuring a scalable and portable verification environment. This position is based in San Diego and requires full-time attendance.
Requirements
- 5+ years of work experience with RTL/FPGA design in Verilog.
- 5+ years of Design Verification, Emulation, and Debug experience.
- Bachelor's degree in Science, Engineering, or related field and 6+ years of relevant work experience, or a Master's degree with 5+ years, or a PhD with 4+ years.
Responsibilities
- Develop verification methodology to ensure a scalable and portable environment across simulation and emulation.
- Own end-to-end design verification tasks including coding test benches and test cases.
- Explore innovative design verification methodologies to enhance test bench quality and efficiency.
- Develop and maintain emulation environments to collect metrics.
- Execute verification plans and debug test failures.
Benefits
- Qualcomm offers competitive compensation, annual bonuses, stock programs, comprehensive healthcare coverage, retirement plans, wellness programs, parental leave, flexible work options, and professional development opportunities.
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