JobsCAD and PPA Methodology Engineer
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CAD and PPA Methodology Engineer

Qualcomm

Location

San Diego, CA

Type

Full-time

Posted

6/11/2026

Compensation

$161,800 - $242,600 per year

Undergraduate with 5+ Years of Experience
Approval 97.1%·Filings 1,170·New hires 255·
Established Sponsor
·FY 2025

Job description

The role is for a member of the Graphics team at Qualcomm, focusing on developing methodologies and algorithms to enhance power, performance, and area (PPA) for GPU cores. The successful candidate will work closely with design and implementation teams, requiring a basic understanding of RTL design and ASIC design flow. Collaboration with various functional teams is essential to drive PPA improvements. The position demands a mix of technical expertise and teamwork to achieve high-quality deliverables.

Requirements

  • Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 4+ years of relevant experience, or a Master's degree with 3+ years, or a PhD with 2+ years.
  • At least 5-7 years of experience developing methodologies for PPA improvement.
  • Basic understanding of digital design and RTL development.
  • Hands-on experience with EDA tools such as Synopsys Fusion Compiler and PrimeTime.
  • Script writing experience in UNIX shell, Python, Perl, and/or TCL.

Responsibilities

  • Develop new flows, methodologies, and algorithms to improve power, performance, and area for GPU cores.
  • Collaborate with design, technology, power, implementation, sign-off, and post-silicon teams.
  • Manage design goals and tradeoffs in power, performance, and area.
  • Identify areas for flow and process improvements.
  • Conduct formal verification for RTL-netlist and netlist-netlist checks.

Benefits

  • Qualcomm offers competitive compensation, annual bonuses, stock programs, comprehensive healthcare coverage, retirement plans, wellness programs, parental leave, flexible work options, and professional development opportunities.

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