Qualcomm is seeking an experienced engineer to join their ASICS Engineering team, focusing on physical design convergence and synthesis. The role involves updating physical implementation flows to optimize power, performance, and area (PPA). The engineer will work independently while collaborating with both physical design and logic teams, utilizing advanced design methodologies and tools. This position requires strong problem-solving skills and the ability to communicate complex information effectively.

• Bachelor's degree in Science, Engineering, or related field.
• 12+ years of ASIC Physical design, Synthesis or related work experience.
• Strong proficiency in P&R, timing analysis, and CAD tools such as Synopsys FC/DC, ICC2 or Cadence Genus, Innovus.
• Very good understanding of Logic optimization for high-speed design implementation.

• Update the physical implementation flows for optimum PPA.
• Drive the development of semi-custom design techniques to maximize utilization, performance, and power efficiency.
• Use and enhance design methodologies to achieve the best PPA through scripting.
• Collaborate with physical design and logic teams with minimal supervision.
• Exercise substantial creativity to innovate new processes and procedures.

• Qualcomm offers competitive compensation, annual bonuses, stock programs, comprehensive healthcare coverage, retirement plans, wellness programs, parental leave, flexible work options, and professional development opportunities.