As a DFT Engineer at Qualcomm, you will collaborate with chip architects, designers, and test engineers to verify the DFT and DFD architecture for mixed signal and digital VLSI designs. This role involves a ground-up implementation of a new chip architecture, allowing you to significantly influence the design process. You will ensure that DFT requirements are met and contribute to enhancing test coverage and debug observability. Your expertise will be crucial in validating designs and working closely with test personnel.

• BA/BS degree in Electrical/Computer Engineering with 5+ years of practical experience.
• Strong fundamentals in digital ASIC design and experience using Verilog or VHDL.
• Experience with ASIC test, DFT, and debug.
• 3+ years of practical experience with test or DFT.
• Experience using Mentor Tessent tools.
• Experience with defining and implementing SOC level verification on large designs.
• Proficiency in TCL, Perl/Python, and Shell scripting.

• Create test vectors or oversee their creation.
• Validate that DFT requirements are being met.
• Work with designers to increase test coverage, debug observability, and flexibility.
• Verify that post-PD designs meet DFT requirements.
• Collaborate with test personnel and run tests when needed.

• Qualcomm offers competitive compensation, annual bonuses, stock programs, comprehensive healthcare coverage, retirement plans, wellness programs, parental leave, flexible work options, and professional development opportunities.