The Yield Analysis and Defects Lead Engineer will be part of the Advanced Packaging Technology and Manufacturing Yield Group at Intel. This role focuses on driving yield and defect improvement initiatives across advanced packaging technologies. The engineer will analyze large datasets and collaborate with cross-functional teams to enhance manufacturing processes and defect detection capabilities. The position offers the opportunity to become a technical expert while leading efforts to resolve complex manufacturing challenges.

• Bachelor's degree with 9+ years of experience, Master's degree with 6+ years of experience, or PhD with 4+ years of experience in a related technical discipline.
• 5+ years of experience performing data analysis using tools like JMP, Python, or similar statistical and data analysis tools.
• Experience applying advanced statistical analysis techniques to manufacturing or yield-related problems.
• Knowledge of semiconductor product design, circuit design, or architecture as it relates to yield analysis.
• Experience with semiconductor manufacturing, advanced packaging technologies, or high-volume manufacturing environments.

• Extract insights from structured and unstructured datasets using statistical analysis and machine learning techniques.
• Analyze large volumes of manufacturing, test, and defect data to identify yield-impacting trends.
• Develop and implement solutions using manufacturing process knowledge and statistical methods.
• Drive recommendations and influence yield improvement roadmaps across technology development and manufacturing organizations.
• Prepare and present detailed technical reports on yield performance and defect trends.

• Intel offers a comprehensive benefits package including competitive pay, stock programs, healthcare coverage, retirement plans, paid time off, parental leave, and programs supporting employee wellbeing and professional development.