NVIDIA is looking for an experienced ASIC Floorplan Engineer to design and implement cutting-edge SOCs, CPUs, and GPUs. This role involves collaborating with multi-disciplinary teams to optimize chip floorplans for performance, cost, and power. The engineer will also develop AI workflows and tools to enhance chip area optimization and execution speed. This position offers a unique opportunity to influence the next generation of technology in a dynamic and innovative environment.

• MSEE/MSCE or equivalent experience with extensive knowledge in chip development.
• 10+ years of experience in the semiconductor industry.
• Experience in developing SOC, CPU, graphics, memory, and I/O sub-systems.
• Proficiency in physical design methodologies, chip floorplan, and timing closure.
• Strong communication skills for presenting progress and options to diverse teams.
• Experience with programming languages such as Python, Perl, and/or C++.

• Collaborate with product managers, chip architects, and design teams to create optimized chip floorplans.
• Drive floorplan development and identify opportunities for improvement in area, interconnect, and timing.
• Develop AI workflows and productivity tools to enhance existing chip design infrastructure.
• Identify technical and product risks and work on mitigation strategies with engineering teams.

• Employees at NVIDIA are often offered comprehensive, day-one benefits—including medical, dental, and vision coverage with HSA support, life and disability insurance, an Employee Assistance Program, and a 401(k) with auto-enrollment. Many roles also have generous time off and holidays, donation matching (up to $10,000), and a wide menu of extras like FSAs, commuter benefits, legal and identity-theft protection, pet insurance, and wellness discounts. Optional programs can include student-loan and home-purchase support, plus family care resources and expert medical services.