The IP Verification Engineer role at Intel focuses on delivering UCIe Mixed-Signal IP for multiple Server SoCs. The position requires collaboration with cross-functional teams to solve technical challenges and improve verification methodologies. Candidates will engage in test bench development and functional verification while supporting mixed-signal verification. This role offers an opportunity to work in a fast-paced environment that encourages continuous learning and growth.

• Bachelor's degree in Electrical/Computer Engineering or Computer Science and 5+ years of experience, or a Master's degree with 3+ years of experience, or a PhD with 2+ years of experience.
• Experience in IP or SoC verification using System Verilog/UVM.
• Ability to read and interpret technical specifications and RTL code for debugging.
• Experience in implementing verification environments with constrained-random stimulus.
• Proficiency in Code/Functional Coverage analysis and writing System Verilog Assertions (SVA).

• Develop test benches and generate directed/constrained random tests in UVM.
• Collaborate closely with the design team to review specifications and architecture.
• Define verification plans, coverage, and improve verification methodologies.
• Run RTL and gate level functional verification, debug failures, and analyze coverage.
• Support mixed-signal verification using Verilog models of analog IP.

• Intel offers a comprehensive benefits package including competitive pay, stock programs, healthcare coverage, retirement plans, paid time off, parental leave, and programs supporting employee wellbeing and professional development.