The Collateral Device Engineer role at Intel's Manufacturing Development and Customer Engineering organization focuses on developing device collateral for semiconductor manufacturing. This position involves working at the intersection of advanced technology development and practical manufacturing solutions. The engineer will collaborate with various teams to establish design rules and optimize test chip designs for high-volume production. The role is essential for ensuring that innovative semiconductor technologies are effectively transitioned into scalable manufacturing processes.

• Master's degree in Electrical Engineering, Physics, or related field with 7+ years of experience in CMOS device engineering.
• Experience in CMOS semiconductor device physics and test chip design for advanced transistor device architecture.
• Hands-on experience in scribe line layout design and process monitoring structure development.
• Proficiency in design rule development, validation, and waiver management processes.
• Experience with DTCO skills, including SRAM and Standard Cells.

• Design and develop comprehensive device collateral including test chip architectures and product scribe line layouts.
• Collaborate with Technology Development teams to establish and refine design rules for newly developed device architectures.
• Develop and manage design-rule waiver processes, ensuring proper documentation and risk assessment.
• Create and optimize scribe line monitoring structures for yield enhancement and process control.
• Work with manufacturing teams to implement device collateral that meets specifications and yield targets.

• Intel offers a comprehensive benefits package including competitive pay, stock programs, healthcare coverage, retirement plans, paid time off, parental leave, and programs supporting employee wellbeing and professional development.