JobsSystem Speed and Reliability Co-Design Engineer
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System Speed and Reliability Co-Design Engineer

NVIDIA

Location

Santa Clara, CA

Type

Full-time

Posted

6/26/2026

Compensation

$136,000 - $264,500 per year

Master's with 2+ Years of Experience
Approval 99.2%·Filings 1,781·New hires 873·
👑 Elite Sponsor
·FY 2025

Job description

As a Silicon Speed Features Engineer at SCG, you will play a crucial role in co-designing system-level speed features and building the necessary validation and automation infrastructure. This hands-on position requires a blend of deep technical expertise and a commitment to optimizing cycle times using modern tools, including AI. You will collaborate with various teams to ensure product quality and performance while leading the debugging of complex silicon issues. The role offers an opportunity to impact the company's success significantly within a dynamic and innovative environment.

Requirements

  • MS in Electrical Engineering, Computer Engineering, Systems Engineering, or equivalent experience.
  • 4+ years of experience in a related hardware engineering role.
  • Hands-on experience with silicon bring-up, frequency and power characterization, and PPA analysis in pre- and post-silicon phases.
  • Proficiency in scripting with Python and/or Perl and comfortable in Windows, Linux, and Android environments.
  • Familiarity with statistical methods and data analysis tools such as JMP or equivalent.
  • Demonstrated use of AI or LLM-based tools in an engineering workflow.

Responsibilities

  • Collaborate cross-functionally with system architects, hardware, firmware/software, process/reliability, and operations teams to co-design system-level speed features.
  • Define system-level specifications, margins, and bounding box constraints that satisfy design expectations and product quality.
  • Provide system requirements for hardware and features affecting speed and reliability from pre-silicon through productization.
  • Translate hardware features and architectural requirements into validation techniques that achieve full coverage across testing flows.
  • Perform closed loop validation by correlating silicon behavior against timing simulation and design expectations.
  • Define, prototype, and refine pre- and post-silicon bring-up flows to ensure product quality, performance, and schedule efficiency.
  • Design and implement automation tools for system speed modeling and apply AI-assisted workflows to compress characterization and debug cycles.
  • Lead debug of complex silicon and system-level issues to enable on-time product shipment.

Benefits

  • Employees at NVIDIA are often offered comprehensive, day-one benefits—including medical, dental, and vision coverage with HSA support, life and disability insurance, an Employee Assistance Program, and a 401(k) with auto-enrollment. Many roles also have generous time off and holidays, donation matching (up to $10,000), and a wide menu of extras like FSAs, commuter benefits, legal and identity-theft protection, pet insurance, and wellness discounts. Optional programs can include student-loan and home-purchase support, plus family care resources and expert medical services.

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