AMD is seeking an experienced VLSI physical design engineer to join its Cores Organization, which focuses on delivering industry-leading CPUs and caches for various computing applications. The role involves being a technical expert and key contributor to the development of next-generation cores and caches. The position is based in Fort Collins, Colorado, and emphasizes innovation, collaboration, and pushing the limits of chip performance. Candidates should be self-motivated and able to work effectively in small teams within a larger organization.

• Hands-on experience in high-speed VLSI design is required.
• Excellent understanding of computer architecture, hardware concepts, and design tradeoffs is necessary.
• Knowledge of chip-level floor planning, bus/pin planning, clock tree synthesis, placement, optimization, routing, parasitic extraction, static timing analysis, IR drop analysis, electromigration, physical verification, and sign-off is essential.
• Ability to comprehend complex Verilog RTL and make minor modifications for timing or power is required.
• Familiarity with programming languages such as Perl, C, and Tcl is preferred.
• Experience with AI agents to enhance engineering efficiency and automation is advantageous.
• A BS/MS in Electrical Engineering, Computer Science, Computer Engineering, or a similar field is preferred.

• Serve as the technical lead for high-speed VLSI design in deep submicron processes.
• Collaborate closely with RTL and physical designers across multiple sites to optimize power, performance, area, and schedule.
• Address design and tool problems with innovative approaches that leverage AI skills and promote innovation within the organization.
• Create technical presentations for peers and management to communicate design concepts and progress.
• Guide and mentor junior engineers to foster their development and enhance team capabilities.

• AMD provides a competitive 'Total Rewards' package that focuses on financial growth, health, and work-life balance.