Intel is seeking a Principal Collateral Device Engineer to join the Manufacturing Development and Customer Engineering (MDCE) organization. This role focuses on creating next-generation device and interconnect technology while ensuring world-class process device performance. The position requires regular onsite presence and involves collaboration with cross-functional teams to deliver innovative device collateral solutions. The ideal candidate will have a deep understanding of device physics and a strong background in CMOS semiconductor device engineering.

• Master’s degree in Electrical Engineering, Physics, or related field
• 15+ years of experience in CMOS device engineering with a focus on test chip design and device collateral development

• Lead cross-functional groups in defining derivative architectures including design rules, transistors, and interconnects.
• Demonstrate expertise in CMOS semiconductor device physics and test chip design for advanced transistor device architecture.
• Develop and monitor scribe line layout design and process monitoring structures.
• Manage design rule development, validation, and waiver processes.
• Utilize DTCO skills to understand SRAM and standard cells while bridging Process Integration, Yield, Device, and Design.
• Analyze data using scripting and statistical techniques for test chip data interpretation.
• Solve technical problems while balancing design rule compliance with customer flexibility needs.
• Collaborate in globally diverse, cross-disciplinary teams to develop innovative device collateral solutions.
• Apply design of experiment (DOE) principles to optimize device collateral.
• Deliver device collateral solutions in a fast-paced manufacturing environment.

• Intel offers a comprehensive benefits package including competitive pay, stock programs, healthcare coverage, retirement plans, paid time off, parental leave, and programs supporting employee wellbeing and professional development.