Qualcomm Technologies, Inc. is seeking an engineer to join their ASICS Engineering team, focusing on the complete verification lifecycle for digital power IPs. The role involves pre-silicon test planning, testbench development using advanced methodologies like SystemVerilog-UVM, and formal verification. The engineer will also work on automation to enhance verification efficiency. This position is ideal for someone with a strong background in ASIC design and verification tools.

• Bachelor's degree in Engineering, Science, or a closely related field.
• 2+ years of experience with ASIC design and verification tools, techniques, and methodology.
• Master’s degree in Computer Science, Electrical Engineering, Computer Engineering, or a closely related field is preferred.
• 6+ years of experience with digital design concepts and RTL languages such as SystemVerilog, Verilog, or VHDL.
• 6+ years of experience with computer architecture fundamentals and programming skills in C or C++.

• Develop comprehensive pre-silicon test plans for digital power IPs.
• Create testbenches using advanced verification methodologies such as SystemVerilog-UVM.
• Engage in coverage development and assertion model development.
• Implement formal verification techniques for property checking.
• Learn and deploy power-aware UPF verification flow and methodology.
• Develop automation tools to improve verification efficiency.

• Qualcomm offers competitive compensation, annual bonuses, stock programs, comprehensive healthcare coverage, retirement plans, wellness programs, parental leave, flexible work options, and professional development opportunities.