The role is focused on creating micro-architecture bus components specifications and analyzing performance results within the NoC bus team at Qualcomm. This multi-disciplinary group is involved from early product specification to final RTL delivery for SoCs. Candidates will need to leverage their knowledge of bus protocols and VLSI design to identify architecture bottlenecks and drive micro-architecture choices. Collaboration with the SoC team and support for verification and silicon validation teams are key aspects of this position.

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience, or a Master's degree with 1+ year of experience, or a PhD in a related field.
• Strong knowledge of various bus protocols such as AHB, AXI, and CHI.
• Experience with ASIC flow including synthesis, STA, and Lint.
• Ability to define bus components micro-architecture with knowledge of performance, power, and area tradeoff.
• Excellent communication skills.

• Create micro-architecture bus components specifications and analyze performance results.
• Deliver RTL and run tool flows for the SoC team.
• Evaluate new IPs and drive new protocol deployments.
• Define system-wide guidelines for IPs to inter-operate in the SoC.
• Support verification and silicon validation teams.

• Qualcomm offers competitive compensation, annual bonuses, stock programs, comprehensive healthcare coverage, retirement plans, wellness programs, parental leave, flexible work options, and professional development opportunities.