Qualcomm is seeking an engineer to join their ASICS Engineering team, focusing on the complete verification lifecycle from concept to post-silicon support. The role emphasizes pre-silicon test planning for digital power IPs and involves advanced verification methodologies such as SystemVerilog-UVM. The engineer will also develop automation to enhance verification efficiency. This position is ideal for individuals with a strong background in ASIC design and verification.

• Bachelor's degree in Engineering, Science, or a closely related field.
• 2+ years of experience with ASIC design and verification tools, techniques, and methodology.
• Master’s degree in Computer Science, Electrical Engineering, Computer Engineering, or a closely related field is preferred.
• 6+ years of experience with digital design concepts and RTL languages such as SystemVerilog, Verilog, or VHDL.
• 6+ years of experience with computer architecture fundamentals and programming skills in C or C++.

• Plan and execute comprehensive pre-silicon tests for digital power IPs.
• Develop testbenches using advanced verification methodologies.
• Create coverage and assertion models for formal verification.
• Implement power-aware UPF verification flows and methodologies.
• Automate processes to improve verification efficiency.

• Qualcomm offers competitive compensation, annual bonuses, stock programs, comprehensive healthcare coverage, retirement plans, wellness programs, parental leave, flexible work options, and professional development opportunities.