In this role at Qualcomm, you will focus on RTL design and verification of digital IPs for Qualcomm chips. You will work on high-speed clock IPs and power-sequencing blocks, collaborating closely with the SOC design and verification teams. The position requires a strong understanding of ASIC design and verification processes. You will also engage in the development and support of front-end deliverables for Soft/Hard-Macros.

• Bachelor's degree in Science, Engineering, or a related field and 2+ years of ASIC design, verification, validation, or related work experience.
• Master's degree in Science, Engineering, or a related field and 1+ year of ASIC design, verification, validation, or related work experience.
• PhD in Science, Engineering, or a related field.
• 2+ years of professional or academic experience with RTL design or verification of digital IPs.
• Knowledge of design verification and experience with design testbench suites.

• Design and verify RTL for digital IPs used in Qualcomm chips.
• Collaborate with SOC design and verification teams on specifications and integration.
• Develop and support front-end deliverables for Soft/Hard-Macros.
• Utilize simulation and formal verification methodologies to execute test plans.
• Write checkers, assertions, and develop stimulus for testing.

• Qualcomm offers competitive compensation, annual bonuses, stock programs, comprehensive healthcare coverage, retirement plans, wellness programs, parental leave, flexible work options, and professional development opportunities.