Qualcomm is seeking an engineer to join their ASIC Engineering team, which is responsible for the complete verification lifecycle from system-level concept to post-silicon support. The role focuses on pre-silicon test planning for digital power IPs, utilizing advanced verification methodologies such as SystemVerilog-UVM. The engineer will also develop automation to enhance verification efficiency and learn power-aware UPF verification flows. This position offers an opportunity to work on cutting-edge technology that drives communication and data processing transformation.

• Bachelor's degree in Engineering, Science, or a closely related field.
• 2+ years of experience with ASIC design and verification tools, techniques, and methodology.
• Master’s degree in Computer Science, Electrical Engineering, Computer Engineering, or a closely related field is preferred.
• 6+ years of experience with digital design concepts and RTL languages such as SystemVerilog, Verilog, or VHDL.
• 6+ years of experience with computer architecture fundamentals and programming skills in C or C++.

• Conduct comprehensive pre-silicon test planning for digital power IPs.
• Develop testbenches using advanced verification methodologies such as SystemVerilog-UVM.
• Create coverage and assertion models for verification.
• Engage in formal verification for property checking.
• Develop automation tools to improve verification efficiency.

• Qualcomm offers competitive compensation, annual bonuses, stock programs, comprehensive healthcare coverage, retirement plans, wellness programs, parental leave, flexible work options, and professional development opportunities.