As an ASIC Engineer at Qualcomm, you will be responsible for defining, modeling, designing, optimizing, verifying, validating, implementing, and documenting IP development for high-performance products. You will collaborate with cross-functional teams to determine the product execution path. The role requires a strong understanding of synthesis methodologies and timing closure for multi-clock domain designs. You will also work independently with design, DFT, and PD teams to ensure high-quality netlist delivery.

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design experience, or a Master's degree with 1+ year of experience, or a PhD.
• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field and 2+ years of Hardware Engineering experience, or a Master's degree with 1+ year of experience, or a PhD.
• 0 to 6 years of hands-on experience in synthesis and LEC.
• Proficiency in Python and Tcl.
• Familiarity with synthesis tools such as Fusion Compiler or Genus.

• Define, model, and design digital and/or analog IP development.
• Optimize and verify designs to ensure high performance and low power consumption.
• Write timing constraints for synthesis and perform timing closure.
• Collaborate with design, DFT, and PD teams for netlist delivery.
• Handle ECOs and formal verification to maintain high quality.

• Qualcomm offers competitive compensation, annual bonuses, stock programs, comprehensive healthcare coverage, retirement plans, wellness programs, parental leave, flexible work options, and professional development opportunities.