The role at Qualcomm Atheros involves working as a key member of the Integrated Wireless Technology team, focusing on WiFi technology and SOC design. The candidate will be responsible for developing low power micro-architecture and design, as well as collaborating with the verification team during the debug phase. This position requires hands-on involvement throughout the full ASIC development process, including specification, RTL implementation, and post-silicon bring up. The ideal candidate will have extensive experience in low power design methodologies and full chip debug using ARM IPs.

• Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design experience, or a Master's degree with 5+ years, or a PhD with 4+ years.
• 7+ years of working experience in ASIC Design.
• 2+ years of experience in low power micro-architecture and design.
• Experience in silicon bring up and debug.
• Required experience on SoC micro architecture and multi-domain clocking.

• Develop technical specifications from architectural and systems requirements.
• Deliver detailed low power micro-architecture and design.
• Work closely with the verification team to develop verification plans.
• Participate actively in the debug phase of the ASIC development process.
• Own the design through the full ASIC development process from specification to post-silicon bring up.

• Qualcomm offers competitive compensation, annual bonuses, stock programs, comprehensive healthcare coverage, retirement plans, wellness programs, parental leave, flexible work options, and professional development opportunities.