The DTECH team at Qualcomm is focused on enabling a state-of-the-art design analytics platform that impacts the power, performance, area, and quality of Qualcomm's products. As a member of the DTECH Methodology team, you will collaborate closely with core and SOC teams. This role requires a strong foundation in ASIC/VLSI design tools and flows, as well as programming skills in Python. You will also engage with static timing analysis tools and contribute to the development of innovative design methodologies.

• M.S/Ph.D. degree in Electrical Engineering or Computer Science with 1-2 years of relevant experience with ASIC/VLSI design tools and flows.
• Strong programming skills in Python.
• Hands-on experience with static timing analysis (STA) tools, e.g., PrimeTime and Tempus.
• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience, OR Master's degree in Science, Engineering, or related field and 3+ years of relevant experience, OR PhD in Science, Engineering, or related field and 2+ years of relevant experience.

• Work closely with core and SOC teams to enable a design analytics platform.
• Utilize static timing analysis tools to ensure design integrity.
• Develop and optimize methodologies for low power architecture and IP.
• Collaborate on the development of internal and external EDA tools.
• Contribute to the foundation IP development and analysis.

• Qualcomm offers competitive compensation, annual bonuses, stock programs, comprehensive healthcare coverage, retirement plans, wellness programs, parental leave, flexible work options, and professional development opportunities.