As an ASIC Design Verification Engineer at Qualcomm, you will be part of a team responsible for the complete verification lifecycle, from system-level concept to tape out and post-silicon support. The role focuses on comprehensive pre-silicon test planning for digital power IPs and involves advanced verification methodologies. You will also develop automation to enhance verification efficiency and engage in power-aware UPF verification flow. This position requires a blend of technical expertise and innovative thinking to transform 5G potential into world-changing technologies.

• Minimum 3 years of DV experience using UVM/assertion based verification technologies
• Experience in verifying complex SOC or SOC subsystems
• Experience with caches and DDR memory protocol verification
• Exposure to firmware/driver development using C++
• Bachelor's degree in Science, Engineering, or related field and 2+ years of relevant experience, or a Master's degree with 1+ year of experience, or a PhD in a related field

• Plan and execute comprehensive pre-silicon tests for digital power IPs
• Develop testbenches using advanced verification methodologies such as SystemVerilog-UVM
• Create coverage and assertion models for verification purposes
• Engage in formal verification and property checking
• Develop automation tools to improve verification efficiency

• Qualcomm offers competitive compensation, annual bonuses, stock programs, comprehensive healthcare coverage, retirement plans, wellness programs, parental leave, flexible work options, and professional development opportunities.