The Qualcomm Custom Memory Team is seeking a candidate to work on 3D Memory Design and Architecture for memory-centric compute systems. This role focuses on optimizing 3D Memory architectures to enhance system performance metrics such as bandwidth, latency, and power efficiency. The candidate will collaborate with various teams, including process and packaging, AI and compute architects, and performance modeling teams. This position offers the opportunity to contribute to innovative solutions in edge AI and connected computing.

• Bachelor's degree in Science, Engineering, or related field and 8+ years of ASIC design experience, or a Master's degree with 7+ years, or a PhD with 6+ years.
• Experience in RTL, circuit and system design to model and optimize dataflow.
• Knowledge of chip connection fabrics such as UCIe, UAL, LPDDR, HBM3/4, and PCIe.
• Proficiency in programming languages such as C/C++ or Python, and familiarity with scripting languages like Perl.
• Good knowledge of memory architecture, buses, and 2.5D/3D integration.

• Develop and optimize 3D DRAM/FLASH organization and near-memory computing architectures.
• Validate models for 3D Memory performance, power, and yield based on various design choices.
• Create novel fabrics for efficient data distribution from 3D DRAM memory arrays to near-memory computing units.
• Simulate and emulate system performance of different 3D memory architecture choices.
• Floorplan 3D memory chips and design memory array control structures under manufacturing constraints.

• Qualcomm offers competitive compensation, annual bonuses, stock programs, comprehensive healthcare coverage, retirement plans, wellness programs, parental leave, flexible work options, and professional development opportunities.