This role involves defining, architecting, and documenting verification strategies for silicon design. The position requires collaboration with both analog and digital teams to support post-silicon validation activities. The successful candidate will develop test strategies and architectures while ensuring compliance with specifications. This is an opportunity to work on high-impact projects within a team focused on innovation and growth.

• Bachelor's degree in Electronics, Computer Engineering, or related field with at least 6+ years of experience, or a Master's degree with 4+ years of experience in silicon design development.
• Proficiency in functional and code coverage closures.
• Expertise in hardware simulation and validation tools, with strong technical proficiency in C/C++/Python and System Verilog.
• Familiarity with IP validation tools, processes, and protocols.

• Define and document verification strategies and methodologies for silicon design.
• Architect testbenches and develop UVM or formal-based verification approaches.
• Integrate block testbenches in a chip-level UVM environment and verify integration.
• Collaborate with architecture and design teams to create random test generation plans.
• Conduct functional simulations to identify gaps in design specifications and perform failure analysis.
• Define and develop security validation strategies and validation infrastructure.

• Intel offers a comprehensive benefits package including competitive pay, stock programs, healthcare coverage, retirement plans, paid time off, parental leave, and programs supporting employee wellbeing and professional development.