The Senior Wafer Test Hardware Engineer at Raxium focuses on ensuring the reliability of Google's custom-designed machines. This role involves designing test equipment for prototypes and developing protocols to scale tests globally. The engineer will work closely with design engineers to enhance hardware quality and reliability. Raxium aims to innovate in display technology, bridging digital and physical realms for applications like augmented reality.

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, Physics, or a specialized field.
• 5 years of experience in writing semiconductor functional tests, including register-level writes/reads and validation on production data.
• 2 years of proven experience with wafer-level probe technologies, including troubleshooting and failure analysis.
• Experience validating hardware and software paths, including step-by-step component validation.

• Drive the specification process for a parallel wafer-level test tool, coordinating with internal teams.
• Define and execute the hardware/software validation path, verifying individual vendor components independently.
• Assemble comprehensive test plans, including defining instruction sets for unique displays.
• Define input and output data streams with vendors and coordinate test and information systems infrastructure.

• Employees at Google are often offered benefits like comprehensive health insurance, 401(k) matching, and flexible work arrangements, among other benefits.