The Chip Package Signal and Power Integrity Engineer at Google will work on shaping the future of AI/ML hardware acceleration, specifically focusing on chip package design and signal/power integrity simulation. This role involves collaboration with system architects, ASIC engineers, and cross-functional teams to drive chip packaging implementations that meet electrical requirements. The engineer will contribute to the development of custom silicon solutions that power Google's TPU technology, impacting millions of users worldwide. The position requires a strong background in signal integrity and power integrity analysis for high-speed interconnects.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 10 years of experience with SI/PI design for chip/package or system PCB.
• Experience in industry Signal integrity and Power Integrity (SIPI) modeling tool chains such as HFSS, ADS, Sigrity, and Siwave.
• Proficient in Python, Matlab, or C++ for automation flows and advanced data processing.

• Drive chip-package-system co-design by performing SI/PI analysis and optimization.
• Develop power integrity methodology for advanced package technology.
• Evaluate new package technology and high-speed interface IP.
• Collaborate with chip design and system design teams to define chip package SI/PI design targets.
• Provide feedback on chip floorplan considering package/system routability and SI/PI.

• Employees at Google are often offered benefits like comprehensive health insurance, 401(k) matching, and flexible work arrangements, among other benefits.