As a Physical Design Clock Engineer at Qualcomm, you will collaborate with microarchitecture, RTL design, and physical design teams to develop advanced clocking solutions for next-generation CPUs. The role focuses on creating low skew and low power clock generation and distribution methodologies. You will leverage your expertise in device physics and circuit design to optimize clocking techniques. This position requires strong communication skills for effective collaboration and problem resolution.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 2+ years of relevant experience, or a Master's degree with 1+ year of experience, or a PhD in a related field.
• Experience in clock H-tree, mesh, spines, and CTS implementations.
• Proficiency in SPICE simulation and analysis for circuit design and verification.
• Good understanding of device physics, RC delay, and electrical aspects.
• Skilled in chip physical design and standard cell optimizations.

• Perform jitter analysis and measurements and provide feedback to design engineers.
• Collaborate with design teams to implement and validate CPU clocking.
• Drive the overall clock generation and distribution methodology for CPUs.
• Work with CAD and block level designers to optimize skew and power in clocking techniques.

• Qualcomm offers competitive compensation, annual bonuses, stock programs, comprehensive healthcare coverage, retirement plans, wellness programs, parental leave, flexible work options, and professional development opportunities.