Qualcomm is seeking a CPU Floorplan and Integration Engineer to join its Data Center team, which focuses on developing high-performance, energy-efficient server solutions. The ideal candidate will collaborate with microarchitecture, RTL design, and physical design teams to meet aggressive power, area, and performance goals. This role emphasizes teamwork and innovation in creating next-generation computing platforms. Candidates should possess strong expertise in physical design and integration of large processor and SoC designs.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 2+ years of relevant work experience, or a Master's degree with 1+ year of experience, or a PhD in a related field.
• Proficiency in synthesis, place and route, and signoff timing/power analysis.
• Expertise in block-level implementation and full chip floorplanning.
• Strong understanding of circuit and layout design principles.
• In-depth knowledge of extraction, static timing analysis, and electromigration and IR drop flows.

• Ensure the designs are validated for functional and electrical robustness.
• Perform CPU physical design tasks, including floorplanning and IP integration.
• Oversee full chip floorplan, area optimizations, and pin assignments.
• Manage chip-level place and route, and finalize the CPU database for construction and verification.
• Coordinate custom layout integration and collaborate with external teams.

• Qualcomm offers competitive compensation, annual bonuses, stock programs, comprehensive healthcare coverage, retirement plans, wellness programs, parental leave, flexible work options, and professional development opportunities.