As a CPU Core RTL Design Engineer at AMD, you will be part of the central core RTL team focused on designing and optimizing high-performance processor cores for various platforms including client, server, and AI. This role involves close collaboration with architecture, performance, verification, and physical design teams to develop core pipeline logic and microarchitecture features. You will have the opportunity to influence the direction of cutting-edge processor technology while addressing complex technical challenges. Your work will directly impact the performance, power efficiency, and scalability of future CPU designs.

• Experience with Verilog/SystemVerilog RTL development in CPU, SoC, or ASIC environments
• Strong understanding of modern CPU architecture, especially out-of-order cores
• Expertise in logic design and high-speed processor pipeline development
• Knowledge of power-efficient and low-power design techniques, including timing and power optimization
• Familiarity with synthesis, place-and-route, and timing closure

• Design and implement RTL for CPU core pipeline components and related logic
• Contribute to microarchitecture definition for next-generation processor cores
• Collaborate with architecture, verification, and performance teams to deliver optimized designs
• Analyze and improve performance, power, and timing characteristics
• Support design verification, synthesis, timing closure, and physical design efforts
• Debug and resolve pre-silicon and post-silicon issues
• Partner with cross-functional teams to align on design trade-offs and execution
• Contribute to scalable RTL methodologies, libraries, and best practices

• AMD provides a competitive 'Total Rewards' package that focuses on financial growth, health, and work-life balance.