As an ASIC Design Engineer on the ANE DMA Design team, you will contribute to the design of high-performance DMA engines that facilitate data movement between memory and the Apple Neural Engine. This role involves collaboration with architecture and verification teams throughout the front-end design cycle. Your work will impact Apple products used by billions of people daily. You will tackle challenges related to data movement, throughput, and correctness in a dynamic engineering environment.

• Bachelor's degree plus 0 years of industry experience
• Familiarity with Verilog or SystemVerilog and core digital design fundamentals
• Some exposure to on-chip bus protocols such as AMBA
• Interest in or exposure to system-level concepts related to SoC design
• Background in or curiosity about high-bandwidth domains such as networking or AI/ML
• Familiarity with scripting languages like Python, Perl, or Tcl

• Write well-parameterized RTL structured for correct synthesis, clean timing, and low power.
• Execute front-end implementation tasks including synthesis, timing closure, and area and power analysis.
• Collaborate with fellow designers and architecture teams to understand design requirements.
• Work closely with design verification and formal verification teams to ensure functional correctness.

• Employees at Apple are often offered comprehensive benefits that support physical and mental well-being—flexible medical plans, confidential counseling, onsite wellness centers at major campuses, and resources for fitness and daily life. Families typically receive fertility support, paid parental leave with gradual return, caregiving leave, and dependent-care guidance, while financial perks commonly include stock grants (with purchase discounts), 401(k) matching, and income-protection coverage. Employees also see robust time off, Apple University learning and tuition reimbursement, donation matching and paid volunteer hours, and deep product and partner discounts.