NVIDIA is seeking a motivated DFT-Timing Engineer to join their dynamic team, focusing on timing analysis and closure for DFT logic across various Nvidia chips. The role involves collaboration with multiple teams to develop timing constraints and drive timing and power convergence. Candidates will have the opportunity to improve workflows through automation and standardization. This position is ideal for individuals looking to challenge themselves in a supportive and innovative environment.

• BS in Electrical or Computer Engineering with 5+ years of experience or MS with 2+ years of experience.
• Hands-on experience in Static Timing Analysis (STA) and driving timing convergence at full-chip/sub-chip level.
• Expertise in analysis and fixing of timing paths through ECOs.
• Expertise in developing timing constraints.
• In-depth knowledge of industry standard timing convergence tools.

• Drive timing analysis and closure for DFT logic on all Nvidia chips at all hierarchical levels.
• Work with PD, DFX, Clocks and other teams to develop timing closure strategies.
• Continuously improve workflows and designs by introducing automation, resilience, and standardization.

• Employees at NVIDIA are often offered comprehensive, day-one benefits—including medical, dental, and vision coverage with HSA support, life and disability insurance, an Employee Assistance Program, and a 401(k) with auto-enrollment. Many roles also have generous time off and holidays, donation matching (up to $10,000), and a wide menu of extras like FSAs, commuter benefits, legal and identity-theft protection, pet insurance, and wellness discounts. Optional programs can include student-loan and home-purchase support, plus family care resources and expert medical services.