Intel is seeking a Senior Design Verification Engineer for the Silicon Chassis team. This role involves end-to-end verification of critical chassis and interconnect IP blocks, ensuring quality in testbench architecture and coverage closure. The engineer will collaborate closely with architecture, design, and software teams while driving the ownership of multiple critical blocks. The position requires strong technical expertise in design verification methodologies and a commitment to delivering high-quality silicon on schedule.

• Bachelor of Science Degree in Electrical or Computer Engineering, Computer Science, or a STEM related field
• 10+ years of experience in design verification with extensive background in IP DV and subsystem and SoC-level verification
• Experience in interconnects, caches, and memory subsystems, including multiple bus protocols such as AMBA, PCIe, UCIe, and CXL
• Hands-on coding experience across SystemVerilog/UVM, C/C++, Python, and build systems
• Experience in simulation and formal verification methodologies including UVM, SVA, ABV, and co-simulation

• Own verification planning and execution for key IP features across IP and subsystem integration points
• Build scalable verification environments and targeted test plans with reusable test benches, checkers, VIPs, and behavioral models
• Collaborate closely with architecture, design, and software teams from specification through bringup
• Drive ownership of multiple critical blocks and verification components, taking full responsibility for functional signoffs
• Lead IP delivery to multiple customers while ensuring technical excellence and balancing competing requirements

• Intel offers a comprehensive benefits package including competitive pay, stock programs, healthcare coverage, retirement plans, paid time off, parental leave, and programs supporting employee wellbeing and professional development.